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Four Channel MIPI Bridge Controller
  • SKU
  • Category
    ASIC - Sensor Bridge GROUP
  • Application
    AR / VR / Drones / Robotics - ASIC

OMNIVISION’s OV680 companion chip is a multi-sensor bridge solution that combines images from four sensors into a single data stream. Ideally suited for high definition (HD) multi-camera applications, the OV680 has four 1-lane MIPI receivers for four video inputs or two 2-lane MIPI for two video inputs, a 2-lane MIPI transmitter for video output, and a built-in 8-bit microcontroller.

The OV680 features integrated image signal processors (ISPs), allowing it to process one, two, or four video streams simultaneously. The companion chip can output 2x 720p video at 60 frames per second (fps), or 4x VGA video at 120 fps.

– Four one-lane MIPI receiver for video input
– Can combine to dual 2-lane video input
– One channel two-lane MIPI transmitter for video output
– Up to 400 kHz SCCB with 13 MHz ~ 26 MHz input clock
– Three general purpose IO (GPIO)
– One open drain output CMD_RDY

On-chip PLLs:
– System PLL – input clock frequency ranges from 13 MHz to 26 MHz
– MIPI speed – 5x or 10x of system clock for raw, 4x or 8x of system clock for YUV

Image signal processor (ISP)
– Two ISPs, one for each input video stream
– Max resolution: 1280 x 800
– Max frame rate: 60 fps at 720p, 120 fps at VGA, 240 fps at QVGA
– Defect pixel correction (DPC)
– Lens shading correction (LENC)

– One SCCB master to control sensors
– One SCCB slave to take the commands from host controller
– 7-bit SCCB slave device ID is fixed to 0x35 (0x6A for write, and 0x6B for read)
– Supports SCCB clock 100 kHz and 400 kHz

Data format:
– Input: raw
– Output: raw 8/10-bit, YUV422

– 8-bit microcontroller running at the system clock
– 16 KByte program memory

Power supply:
– 1.8V for DOVDD, 2.8V for MIPI and PLL analog
– Internal regulator generates 1.2V DVDD from DOVDD for the digital core circuit
– Hardware standby mode: initiated by pulling PWDN high, whole system halts and input clock is gated
– Software standby mode: initiated by register, whole system except the SCCB slave block halt

  • Spec
  • Input Interface
    4x 1-lane MIPI
  • Output Interface
    2-lane MIPI
  • Max Frame Rate
    720p x 2 @ 60 fps
  • Package Type
    64-pin BGA
  • Description
    2, or 4 sensor image streams simultaneously, Sensor bridge chip for multiple video streams with image signal processor (ISP) to process 1
  • Target Solutions
    Drone, Eye tracking, Robotic
  • Key Features
    2 x 720p @ 60 fps, 4 x VGA @ 120 fps, Built-in ISP, MIPI in and out